The present invention relates to semiconductor devices including a capacitor unit having a large capacitance and methods of manufacturing such semiconductor devices.
Devices such as portable phones and the like, which are small in size and mainly used while being carried, have various requirements to achieve weight reduction and miniaturization. To reduce the number of parts has been examined as a means for the requirements.
Capacitors having a large capacitance, which are used in voltage increasing circuits in, for example, power supply circuits, for increasing an external power supply voltage to a high voltage of about 3-9 V, occupy a large space. Thus, they are sometimes arranged as components different from IC chips, in which a driver circuit is formed, and packaged on boards or substrates. In such a case, since the number of parts is increased, the requirements for the weight reduction and miniaturization are not satisfied and moreover a parts packaging process is made necessary, which is disadvantageous in assembling cost.
One embodiment of the present invention relates to a semiconductor device, including a capacitor unit formed on a semiconductor substrate. The capacitor unit is divided into a plurality of capacitor subunits which are separated from each other by a separating layer. Each of the capacitor subunits includes a first electrode layer, a second electrode layer, and a dielectric layer interposed between the first electrode layer and the second electrode layer.
Another embodiment relates to a method of manufacturing a semiconductor device, including forming a capacitor unit on a semiconductor substrate. The capacitor unit is divided into a plurality of capacitor subunits in such a manner that first and second conductive layers are divided by a separating layer having a predetermined pattern. Each of the capacitor subunits comprises a first electrode layer, a second electrode layer, and a dielectric layer interposed between the first electrode layer and the second electrode layer.
Another embodiment relates to a method for manufacturing a semiconductor device including forming a plurality of capacitor subunits on a substrate, the subunits each including a first electrode layer, a dielectric layer, and a second electrode layer. A separating layer is formed between adjacent subunits, the separating layer including an insulating layer disposed between adjacent second electrode layers. At least a plurality of the subunits are connected together in parallel. At least one MOS transistor is formed on the substrate, the MOS transistor including at least one layer formed at the same time using the same deposition process as at least one layer of the plurality of capacitor subunits.
Still another embodiment relates to semiconductor device including a plurality of capacitor subunits on a substrate, the subunits each including a first electrode, a dielectric, and a second electrode. A separation layer is disposed between the subunits, the separation layer including a first interlayer insulating layer, a dielectric layer, and a protective layer.